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 VT98521 3.3V Clock Multiplier
Applications
*= Low cost general-purpose clock source
General Description
The VT98521 is a 3.3V CMOS, clock multiplier integrated circuit. The device provides an excellent quality high frequency output clock from a lower frequency crystal or clock input. Tri-level selection inputs S0 and S1 are used to select any one of eight multipliers, stored in the on-board ROM, and apply it to the input to produce the desired output, up to 220 MHz. Phase Locked Loop (PLL) technology allows the device to use an input signal from an inexpensive crystal. When Output Enable (OE) is low, the clock output is in high impedance state. The VT98521, when used with an inexpensive crystal, provides a cost-effective clock source for most electronic systems.
Features
*= *= *= *= *= *= Low phase noise Zero ppm multiplication error Input clock frequency 5 - 50 MHz. Input crystal frequency 5 - 27 MHz Output clock frequencies up to 220 MHz. 5V-tolerant inputs and output *= *= *= *= Fully Compatible with all popular CPUs Duty Cycle - 45/55 up to 160 MHz. - 40/60 160 MHz to 220 MHz 25mA drive capability at TTL levels High-Z output for board level testing
Figure 1. Functional Block Diagram
Figure 2. Pin Assignment
VDD
GND
8-pin SOIC/MSOP
S0 S1 Clock or Xtal X1/ICLK input PLL Clock Multiplier & ROM
Xtal. Osc.
Output Buffer
CLK
X1/ICLK VDD GND S1
1 2 3 4
8 7 6 5
X2 OE S0 CLK
X2
Optional caps
Output Enable
2002-02-25 Vaishali Semiconductor
Page 1 www.vaishali.com 747 Camden Avenue, Suite C Campbell
MDST-0017-02 CA 95008 Ph. 408.377.6060 Fax 408.377.6063
VT98521
Table 1. Clock Output Table
S1 0 0 0 M M M 1 1 1 S0 0 M 1 0 M 1 0 M 1 CLK 4 x input 5.3125 x input 5 x input 6.25 x input Test* 3.125 x input 6 x input 3 x input 8 x input Minimum Input See table 6 20 MHz See table 6 4 MHz 8 MHz See table 6 See table 6 See table 6
0 = Connect to ground. 1 = Connect directly to VDD M = Leave unconnected (floating) * = For Vaishali internal test purposes only
Table 2. Pin Description
No. 1 2 3 4 5 6 7 8 Name X1/ICLK VDD GND S1 CLK S0 OE X2 Type I P P TI O TI I O Description Xtal connection or clock input. Connect to +3.3V Connect to ground. Select 1 for output clock. Connect to ground or VDD or float Clock output per table 2. Select 0 for output clock. Connect to ground or VDD or float. Output Enable. Tri- states CLK output when low. Xtal connection. Leave unconnected for clock input.
Legend: I = Input TI = Tri-level Input O = Output P = Power supply connection
Table 3. Absolute Maximum Ratings
Parameter
Supply voltage, VDD Inputs and Clock Outputs Soldering Temperature Storage temperature
Conditions
Referenced to GND Referenced to GND Max of 10 seconds
Min
-0.5
Typ
Max
4.6 4.6 260
Units
V V C C
-65
150
2002-02-25 Vaishali Semiconductor
Page 2 www.vaishali.com 747 Camden Avenue, Suite C Campbell
MDST-0017-02 CA 95008 Ph. 408.377.6060 Fax 408.377.6063
VT98521
Table 4. Operating Conditions
Parameter
Ambient Operating Temperature Operating Voltage, VDD Input High Voltage, VIH, X1 pin only Input Low Voltage, VIL, X1 pin only Input High Voltage, VIH, OE pin Input Low Voltage, VIL, OE pin Input High Voltage, VIH, trinary inputs Input Low Voltage, VIL, trinary inputs VDD-0.5 0.5 2 0.8
Min
0 3 2.5
Typ
Max
70 3.6
Units
C V V
1.65 1.65 0.5
V V V V V
DC Characteristics
Table 5. DC Characteristics
VDD = 3V to 3.6V
Parameter
Output High Voltage, VOH Output Low Voltage, VOL Operating Supply Current, IDD (20 MHz Xtal) Short Circuit Current Input Capacitance Frequency synthesis error
Condition
IOH=-25mA IOL=25mA No Load, 100MHz CLK output S0, S1, OE, X1, X2
Min
2.4
Typ
Max
0.4
Units
V V mA mA pF
25 100 4 0
ppm
2002-02-25 Vaishali Semiconductor
Page 3 www.vaishali.com 747 Camden Avenue, Suite C Campbell
MDST-0017-02 CA 95008 Ph. 408.377.6060 Fax 408.377.6063
VT98521
AC Characteristics
Table 6 AC Characteristics
VDD = 3V to 3.6V over the operating temperature range
Symbol
fosc fin fout tr tf tod
Parameter
Input Crystal Frequency Input clock frequency Output Frequency, Output Clock Rise Time Output Clock Fall Time Output Clock Duty Cycle
Condition
Min
5 5 24
Typ
Max Units
27 50 220 MHz MHz MHz ns ns 55 60 % % kHz 50 50 ns ns ps
0.8 to 2.0V 2.0 to 0.8V 1.5 V up to 160 MHz 160 MHz to 220 MHz 45 40 10
1 1 49 to 51
PLL Bandwidth TPZH, TPZL TPHZ, TPLZ tjit (abs) Output Enable Time, OE high to output on Output Disable time, OE low to Tri-state Absolute Clock period Jitter Deviation from mean fout = 160 MHz tjit (sigma) One Sigma Clock Period Jitter fout = 160 MHz
70
25
ps
Note1: External Crystal Connection.
The external crystal should be connected in as close physical proximity to the VT98521 as possible. The crystal should be a fundamental mode, parallel resonant. Do not use third overtone. External load capacitors should be fitted in accordance with the crystal manufacturer's specifications.
Note2: Decoupling and termination.
Decoupling capacitors of 0.01 F and 0.1 F should be connected between VDD and Ground. Capacitors should be mounted as close to the chip as possible. A 33 termination resistor may be connected in series with the clock output in order to minimize ringing and reflections.
Figure 3. External Crystal Connection Block Diagram
Crystal
X2 XTAL OSC X1 CX2 CX1 33pF CX1 PLL PLL CLOCK GEN. OE
CLK CLK3 106.25MHz
External Crystal Load Capacitors
2002-02-25 Vaishali Semiconductor
Page 4 www.vaishali.com 747 Camden Avenue, Suite C Campbell
MDST-0017-02 CA 95008 Ph. 408.377.6060 Fax 408.377.6063
VT98521 Package Dimensions. MSOP
SYMBOLS VARIATIONS (ALL ARE IN MM) AA MIN 0 0.75 0.22 0.08 NOM 0.85 3.00 BSC 4.90 BSC 3.00 BSC 0.6 0.65 MAX 1.1 0.15 0.95 0.38 0.23
A A1 A2 b c D E E1 L e oc OC1
0.4 0 5
0.8 8 15
All dimensions are in millimeters
SOIC
SYMBOLS
VARIATIONS (ALL ARE IN MM) AA MIN 1.35 .011 0.33 0.19 4.80 3.80 5.80 0.25 0 0.40 NOM 1.55 0.42 0.22 4.90 3.90 1.27 BSC 6.00 0.38 5 8 MAX 1.75 0.25 0.51 0.25 5.00 4.00 6.20 0.50 8 1.27
A A1 B C D E1 e E h oc L N
All dimensions are in millimeters
Ordering Information
Part Number VT98521S1 VT98521S1X VT98521M VT98521MX VT98521/D VT98521/DW
2002-02-25 Vaishali Semiconductor
Marking VT98521S1 VT98521S1 VT98521M VT98521M
Shipping/Packaging Tubes Tape & Reel Tubes Tape & Reel Dice in waffle-packs Dice in wafer form
No. of Pins 8 8 8 8
Package SOIC SOIC MSOP MSOP
Temperature o o 0 C to +70 C o o 0 C to +70 C o o 0 C to +70 C o o 0 C to +70 C o o 0 C to +70 C o o 0 C to +70 C
MDST-0017-02
Page 5 www.vaishali.com 747 Camden Avenue, Suite C Campbell
CA 95008
Ph. 408.377.6060
Fax 408.377.6063


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